AMD Agena & Kuma Details

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Agena & Kuma Details



metro.cl disse:
Core Enchancements:

128 Bit floating point:
  • Applies only to Agena & Kuma

New SSE4A instructions:
  • Advanced Bit manipulation
  • MWAIT & MONITOR instructions
  • Misaligned SSE Mode
Additional Features:
  • Power management state invariant time stamp counter (TSC)
  • increased number of TLB Page entries
  • 1GB large paging support
  • Physical address space increased to 48 bits
IMC Enhancements

DDR2 Dimms in products variations:
  • Socket AM2+: Dual Channel unbuffered 1066 support
  • Socket 1207+ Dual Channel unbuffered 1066 support
Memory Controller enhancements
  • Write Burst & DRAM prefetching performance improovements
  • DRAM writes can be buffered in the memory controller before being opportunistically bursted into DRAM controler to improve DRAM interface efficiency
  • Read prefetcher detects stride paterns and issues prefetch requests based on confidence level
  • Channel Interleaving
Roadmap:

Agena FX:

Q3 2007:
2.7-2.9GHz
2MB L2 total L2 cache for the CPU (quad core so 512KB each core)
2MB shared L3
Socket 1207+
4000MHz hypertransport Bus
TDP not determined yet
65nm SOI

Agena:

Q3 2007:
2.4-2.6GHz
2MB L2 total L2 cache for the CPU (quad core so 512KB each core)
2MB shared L3
Socket AM2+
4000MHz hypertransport Bus
TDP 125W
65nm SOI

Kuma:

Q3 2007:
2.0-2.9GHz
1MB L2 total L2 cache for the CPU (dual core so 512KB each core)
2MB shared L3
Socket AM2+
4000MHz hypertransport Bus
TDP 89w - 65w
65nm SOI


Source Chilehardware



http://www.xtremesystems.org/forums/showthread.php?t=131573





More AMD Next Generation Desktop Details Leaked


AMD's native quad-core design picks up more steam

In a series of memos forwarded to DailyTech, industry insiders discussed the upcoming launch frequencies regarding AMD's next-generation architecture, previously dubbed K8L by AMD's Executive Vice President Henri Richard. Since then, AMD has generally referred to the next-generation chips as the Barcelona family, although Barcelona specifically denotes the high-performance quad-core server processor codename.

Some details of next-generation AMD desktop processors, the Stars family, were revealed late last year.

The desktop equivalent of Barcelona, codenamed Agena, is the 65nm flagship of AMD's next-generation desktop processors. Launch frequencies were quoted at "2.4 - 2.6GHz." Previous roadmaps had indicated Agena would debut at 2.7 to 2.9 GHz. Agena will have a 2MB L2 and 2MB L3 cache per CPU. AMD's internal guidance denotes this as a 125W TDP processor. As the flagship, Agena will be the first next-generation desktop launch and is scheduled for Q3'07.

Kuma, the dual-core mainstream next-generation desktop processor was quoted as having launch frequencies of "2.0 - 2.9GHz." Unlike the quad-core Agena processors, Kuma will feature 1MB of L2 and 2MB of shared L3 cache. Kuma will launch with both 89W and 65W TDP variants, but Energy Efficient models scheduled for 35W TDP will follow shortly after.

Rana, the next-generation Sempron successor codename, will launch with frequencies in the 2.1 to 2.3 GHz range. The dual-core CPUs will feature 1MB of total L2 cache, but no L3 cache. Rana's TDP is rated at 65W. Rana will not launch with the Agena flagship; AMD roadmaps have the processor launching at the same time as the Energy Efficient Kuma processors, or approximately Q4'07 if the launch schedule holds together.

As previously reported on DailyTech, Stars processors will use AM2+ motherboards. These processors can plug into existing AM2 motherboards today given the proper BIOS updates, but without the AM2+ sockets Stars processors will drop down to the HyperTransport 1.0 bus speeds.

AMD's Agena FX codename also appears to still exist on the roadmap. The only difference at this point between Agena and Agena FX is that Agena FX will use the Socket 1207+ interface.




http://www.dailytech.com/article.aspx?newsid=5874





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