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AMD hints at high-performance Zen x86 architecture
Published on 11th September 2014 by Gareth Halfacree

AMD's Rory Read has admitted that the Bulldozer microarchitecture was a misstep for the company, but promises its next-generation replacement - codenamed Zen - will bring the company back to where it needs to be.

AMD has admitted that its Bulldozer microarchitecture was a misstep but claims that its next-generation replacement, Zen, will deliver the performance improvements required to become competitive with Intel once more.

Speaking at the Deustche Bank 2014 Technology Conference this week, AMD chief executive Rory Read gave a surprisingly honest appraisal of the Bulldozer microarchitecture around which its current-generation processors are designed. 'Everyone knows that Bulldozer was not the game changing part [expected] when it was introduced three years ago,' Read told attendees, according to a partial transcript prepared by WCCFTech. 'We have to live with that for four years.'

When those four years are up, however, AMD promises that it will have something a little special ready. 'For Zen [and] K12 we went out and got Jim Keller, we went out and got Raja Koduri from Apple, Mark Papermaster, Lisa Su,' Read explained, referring to his company's recent hiring spree of big-name industry specialists. 'We are building now our next generation graphics and compute technology that customers are very interested in [...] they’ll move to the next generation node and they’ll be ready to go.'

The speech is the first time AMD has publicly talked about its next-generation x86 microarchitecture, now confirmed as being codenamed Zen. This will launch, it appears, alongside the K12 ARM-based desktop architecture the company has been planning, in order to 'capture [desktop] ARM before it happens.'

Read did not provide any technical details of Zen, or how it differs from the current batch of Bulldozer and derived designs, but he did confirm that the company is targeting the usual manufacturing improvements including FinFET technology and process nodes down to the 14nm and 10nm size. The first FinFET-based product will, Read claimed, launch in 2016, but he did not provide a hint as to the process size.

http://www.bit-tech.net/news/hardware/2014/09/11/amd-zen/1

AMD’s next-gen CPU leak: 14nm, simultaneous multithreading, and DDR4 support
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Ever since it became clear that AMD’s Carrizo would be a mobile update with a focus on energy efficiency as opposed to raw performance, enthusiasts and investors have been hungry for details about the company’s upcoming CPUs in 2016. AMD has been tight-lipped on these projects, though we heard rumors of a combined x86-ARM initiative that was up and running as of early last year — but now, a handful of early rumors have begun to leak about the eventual capabilities of these new cores.

As with all rumors, take these with a substantial grain of salt — but here’s what Sweclockers.com is reporting to date. We’ll rate the rumors as they’re given on the site: According to the post, the new AMD Zen is:

Built on 14nm: For a chip launching in 2016, this seems highly likely. Jumping straight for 14nm won’t obviate the gap between AMD and Intel, but the company is currently building its FX chips on legacy 32nm SOI while its Kaveri and Carrizo are both 28nm bulk silicon. The double-node jump from 28nm to 14nm should give AMD the same benefits as a single-node process transition used to grant. Given the advantage of FinFET technology, we’d be surprised if the company went with anything else. The chips are also expected to be built at GlobalFoundries, which makes sense given AMD’s historic relationship with that company.

Utilize DDR4: Another highly likely rumor. By 2016, DDR4 should be starting to supplant DDR3 as the mainstream memory of choice for desktop systems. AMD might do a hybrid DDR3/DDR4 solution as it did in the past with the DDR2/DDR3 transition, or it might stick solely with the new interface.

Up to 95W: Moderately likely, moderately interesting. This suggests, if nothing else, that AMD wants to continue to compete in the enthusiast segment and possibly retake ground in the server and enterprise space. Nothing has been said about the graphics architecture baked on to the die, but opting for an up-to 95W TDP suggests that the company is giving itself headroom to fight it out with Intel once again.

Opt for Simultaneous multithreading as opposed to Cluster Multithreading: With Bulldozer, AMD opted for an arrangement called cluster multi-threading, or CMT. This is the strategy used by Bulldozer, in which a unified front end issues instructions to two separate integer pipelines. The idea behind the Bulldozer design was that AMD would gain the benefits of having two full integer pipelines but save die space and power consumption compared to building a conventional multi-core design.



Intel, in contrast, has long used simultaneous multithreading (SMT), which they call Hyper-Threading, in which two instructions from different threads can be executed in the same clock cycle. In theory, AMD’s design could have given it an advantage, since each core contains a full set of execution units as opposed to SMT, where those resources are shared, but in practice Bulldozer’s low efficiency crippled its scaling.

The rumor now is that AMD will include an SMT-style design with Zen. It’s entirely possible that the company will do this — Hyper-Threading is one example of SMT, but it’s not the only implementation — IBM, for example, uses SMT extensively in its POWER architectures. The reason I’m not willing to completely sign off on this rumor is that it’s a rumor that’s dogged AMD literally since Intel introduced Hyper-Threading 15 years ago.

The benefits of using SMT are always dependent on the underlying CPU architecture, but Intel has demonstrated that the technology is often good for a 15-20% performance increase in exchange for a minimal die penalty. If AMD can achieve similar results, the net effect will be quite positive.

The final rumor floating around is that the chip won’t actually make an appearance until the latter half of 2016. That, too, is entirely possible. GlobalFoundries’ decision to shift from its own 14nm-XM process to Samsung’s 14nm designs could have impacted both ramp and available capacity, and AMD has pointedly stated that it will transition to new architectures only when it makes financial sense to do so. The company may have opted for a more leisurely transition to 14nm in 2016, with the new architecture debuting only when GF has worked the kinks out of its roadmap.


We know HBM is coming, but it may not come to desktops or APUs immediately.

No information on performance or other chip capabilities is currently available, and the company has said nothing about the integrated GPU or possible use of technologies like HBM. The back half of 2016 would fit AMD’s timeline for possible APU integration of HBM — which means these new chips could be quite formidable if they fire on all thrusters out of the gate. During its conference call last week, AMD mostly dodged rumors about delays to its ARM products, noting that it had continued sampling them in house and was pleased with the response. Presumably the company’s partners remain under NDA — there are no published independent evaluations of these products to date.

http://www.extremetech.com/extreme/...-simultaneous-multithreading-and-ddr4-support


AMD Zen To Be Featured Inside Summit Ridge Family of 14nm Processors – Rumored To Feature FM3 Socket Support and DDR4 Memory Compatiblity
Hardware 4 days ago by Hassan Mujtaba
The next generation AMD Zen architecture is still undergoing development and will take some time before it’s available to consumers. A report from Sweclockers suggest that the processors which reportedly arrives in Q3 2016 will make home to a new family of high-performance chips known as Summit Ridge. The new processors will be aimed towards both server and consumer markets and will pack true next generation performance over the aging construction cores which started their journey four years ago with Bulldozer.



Image Credits: Sweclockers!

AMD Zen Featured Inside Summit Ridge 14nm Processor Family
The report posted by the source is pretty detailed, unveiling information we have never before heard of. For instance, we are well known to FX and Opteron series however AMD has planned a new name for their next generation AMD Zen based family and they will be called Summit Ridge. Now it’s likely that it might have some relation with the K12 ARM Core family which AMD seems to be launching in 2016 that is based on their own custom design 64-bit design. K12 is the name of the second highest peak situated in the Karakoram range so Summit Ridge as a whole may be a reference to peak in performance and efficiency since this is a completely new architecture.

The upcoming bits get even more interesting with the report alleging that AMD’s next cores are shifting from 32nm straight down to 14nm. The Summit Ridge series will contain up to 8 x86 cores based on the AMD Zen architecture and will be manufactured by either Samsung or Global Foundries. On power side, while AMD’s FX series currently pushes the TDP to 95W on APUs, 125W on FX series and 220W on the 5 GHz series, the Zen based processors will feature a maximum TDP of 95W which is inline with Intel’s 22nm Haswell offerings and also what Broadwell is supposedly going to get when it launches on desktop sometime in mid-2015. There will also be more power efficient variants toning the TDP down to more conservative levels as Zen will be featured across the board and is likely to be as scalable as Broadwell architecture which has seen 4.5W TDP variants in the form of Broadwell-Y.

On the main architectural side of things, AMD Zen cores will take the best from Bulldozer and Jaguar, delivering a SMT (Simultaneous Multithreaded) design that takes advantage of the various resources in the core and dedicate it to an additional execution thread for added throughput. This adds to the area efficiency of the core design and reduces the effect of stalls and pipeline back pressure leading to improved resource utilization inside the core which in turn improves overall performance.

Everyone knows that Bulldozer was not the game changing part when it was introduced three years ago. We have to live with that for four years but Zen, K12 we went out and got Jim Keller we went out and got Raja Koduri from Apple, Mark Papermaster, Lisa sue. We are building now our next generation graphics and compute technology that customers are very interested in and they’ll ( referring to the next generation graphics and compute architecture) move to the next generation node and they’ll be ready to go.

There are also talks regarding the platforms where it’s mentioned that AMD is planning to make a new socket called AMD FM3. There’s no mention what platform is the FM3 socket intended for, some might say that it is the successor to the FM2+ but it might be AMD planning to unify all of their processors on a same socket since that’s what they are going to do Project Sjybridge offering pin-to-pin compatibility for x86 and ARM chips. AMD also adopted a similar design for Carrizo and Carrizo-L which are pin-to-pin compatible. This socket unification project may extend to Zen offering compatibility of high-performance consumer processors and server chips on the same socket. It is said that all Zen based chips will include a northbridge on the same silicon as the CPU and the new southbridge for motherboards will be known as Promontory which is also a reference to land mass like the K12 peak, summit and ridge references in their new naming schemes.

The report alleges that Summit Ridge featuring AMD Zen architecture will make its way only in 2016 since the series was pushed to Q3 of 2016 from an earlier time frame it was previously expected to launch. Regardless of the date, the new AMD Zen based Summit ridge family will enter the market five years after the launch of first generation Bulldozer.


Read more: http://wccftech.com/amd-zen-feature...pport-ddr4-memory-compatiblity/#ixzz3QIu3nvZQ

http://wccftech.com/amd-zen-feature...-fm3-socket-support-ddr4-memory-compatiblity/



Não encontrei nenhum tópico referente a isto mas se já existir, apaguem este.
 
AMD está longe de acabar. Quer seja pelo mercado lowcost ou mesmo o novo nicho dos APUs onde a Intel ainda não conseguiu competir.
 
Última edição:
Vai ver os resultados financeiros da AMD e depois vem falar comigo.
Mas se a empresa em si não acaba, pelo menos a divisão dos CPUs x86 vai ao ar e correm o risco de ser absorvidos por uma empresa maior.
 
Não há muito para comentar ainda, até porque é um processador que está a um ano e meio de sair.
8 cores não diz muito. Depende de como é cada core. SMT por cima seria interessante, mas 8 cores mais SMT, como é que a AMD vai alimentar esses cores a nível de memória? Só com dual channel? Mesmo sendo DDR4, pode ser complicado.

E SMT tipo Intel ou mais avançado tipo Sparc e Power actuais?

Dito isto, o Xeon D da Intel vai até 8 cores e penso que só usam dual channel, mas já para este ano.

Será interessante se a versão ARM for pin compatible.
 
O que mais acho interessante é que o SMT poderia significar o fim dos clusters e o fim da memória cache não coerente que tantos problemas trouxe.
 
Eu tenho alguma expectativa para este AMD Zen. Precisamos de uma AMD competitiva no mercado para a Intel não se deixar dormir e para existerem alternativas à altura.
 
Era mel era! Se fossem lançados e tivessem a performance p/core de um 4790k p/core... Já era alguma coisa! Mas creio que nem isso! a ver vamos o que a AMD nos reserva!
 
GO AMD

espero bem que sim sempre fui PRO amd

tenho saudades dos tempos dos FX64 os ultimos cpus a macho da amd e opertrons a macho tambem gostaria imenso que a AMD anda-se taco a taco com a intel e a supera-se

lets hope !

cumps
 
http://wccftech.com/amd-ditching-bulldozer-instruction-sets-zen-high-performance-core-wip/

AMD’s Next Gen Zen Core Features Many New Instruction Sets And Leaves Behind Some Old Ones
HARDWARE 19 hours ago by Khalid Moammer
AMD’s highly anticipated Zen core will feature a plethora of new instruction sets, but will also lose some Bulldozer specific ones in the process and for good reason. This information was revealed through a patch released by AMD to ensure compatibility between the new core and Linux.


Zen is AMD’s next generation high performance x86 CPU core. It’s being developed in tandem with its“sister” core the 64bit, ARMv8 based K12. We exclusively broke the news about Zen over six months ago when the company’s then CEO, Rory Read, revealed the code name for the core.

AMD’s Next Gen Zen Core Features Many New Instruction Sets And Leaves Behind Some Old Ones
Zen will succeed AMD’s last Bulldozer based CPU core, code named Excavator, in 2016. Excavator will be featured in AMD’s upcoming APU’s code named Carrizo. The Excavator CPU core has been tweaked specifically for the mobile segment. AMD states that the new core consumes 40% less power than its predecessor Steamroller. And Carrizo represents the most significant power efficiency leapthe company has ever achieved with any APU.

64e.jpg


According to sweclockers, the new core will first make its debut to desktop processors inside the Summit Ridge family of products. Which will feature up to 8 Zen CPU cores under a frugal 95W TDP. Which indicates that the new CPU core will be highly power efficient. According to the same source the Summit Ridge family of products will debut on a new FM3 socket, will support DDR4 memory and will be built on 14nm FinFET.


The Linux patch revealed the instruction sets that Zen will support. Zen will support all the instruction sets of previous AMD CPU cores except four specific sets introduced with bulldozer and these include TBM, FMA4, XOP, and LWP. These AMD exclusive instruction sets will no longer be supported due to their underutilization to save both area and power that can go into building more useful structures in the core.

However the good news is that what has gone in is far more than what has gone out. AMD has implemented support for several new instruction sets in Zen. These include SMAP, RDSEED, SHA, XSAVEC, XSAVES, CLFLUSHOPT, and ADCX. Some of the mentioned instruction sets are new extensions which have been introduced by Intel with Broadwell. However the majority of the new instruction sets that Zen will support we haven’t seen or heard about anywhere else yet, not even with Skylake. So they seem to be unique to the Zen microarcthiecture.

Michael Larabel from Phoronix states :

It’s nice to see with Zen that AMD will support the RDSEED instruction, which Intel has added since Broadwell for seeding another pseudorandom number generator. SMAP is short for the Supervisor Mode Access Prevention and is another Intel instruction set extension already supported by Linux.
AMD Zen also adds a new CLZERO instruction. This is a new one and “clzero instruction zero’s out the 64 byte cache line specified in rax. Bits 5:0 of rAX are ignored.”



Read more:http://wccftech.com/amd-ditching-bu...-zen-high-performance-core-wip/#ixzz3VE3hHVOY
 
AMD x86 Zen Based High-Performance APU Detailed – Rumored To Feature 16 Cores, 16 GB HBM Memory, Greenland iGPU and DDR4 Memory Support
HardwareRumor 2 hours ago by Hassan Mujtaba
Note: This article is tagged as a rumor, the information being reported shouldn’t be considered as official confirmation until an official announcement is made by AMD.

Fudzilla has detailed an interesting product which they have been talking about since the last couple of weeks. According to their sources, AMD might be up to something big with their next generation APU design that will be featuring the x86 Zen core architecture and a GCN enabled integrated graphics compartment, allowing true high-performance accelerated processing units for the HPC/Server markets.



AMD x86 Zen and GCN Based High-Performance APU Rumored To Featured HBM and DDR4 Memory Support
The rumor is too much to consume and may be entirely fabricated as a the design mentioned in the single slide is far too imaginary for AMD who are developing nothing close to the product detailed. The only two platforms which AMD is launching for consumers in the future include Carrizo on notebook and Godavari on the desktop front. This leaves their x86 Zen architecture to end up inside server processors by late 2016 along with a high-performance consumer platform. The slide from Fudzilla might be for a product that doesn’t exist or if existed, may launch far in the future.

There’s no exact name given to the APU mentioned in the slide, it’s just the technical part being shown that lists down the architectural details. The product is distinctly mentioned to be used in the server/HSA market which AMD is focused towards with their upcoming parts. The x86 Zen being a SMT design will boast 16 high performance Zen cores and 32 threads (two threads per core). The Zen cores are backed by 512 KB of L2 cache and a quad module of these cores share 8 MB of L3 cache which puts the total available L2 cache to 8 MB and LLC (L3) cache to 32 MB. Two technologies, AMD Crypto Co-Processor and Secure Boot indicate that it is most likely a product aimed towards the compute HSA sector and this might be believable since the APU sounds a bit too much for a mainstream platform which gets $150 US APU models.



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Ok this might get a bit crazy from this point onward, the rumor alleges that the APU will further feature the Greenland GPU which has the next generation GCN architecture and support HBM memory. Known as the Greenland Graphics and Multi-Media Engine, the block diagram reveals that it takes a large portion of the die space and has its own dedicated 16 GB of HBM memory that pumps out 512 GB/s bandwidth. The GPU also has 1/2 rate double precision compute available to it which is a first in the APU department and also points to ECC, RAS and true HSA support.

AMD is also putting a Quad channel DDR4 memory controller on the said APU design which will allow support of up to 256 GB memory per channel (SODIMM/UDIMM/RDIMM/LRDIMM). Basically, there’s 2 DIMMs supported per channel so we are looking at 1024 GB of DDR4 memory support with speeds rated at 3200 MHz. Furthermore, the APU has 64 PCI-e 3.0 channels and the lanes can be dedicated to either SATA Express and SATA which take up 16 lanes (2 for SATA-E and 14 for SATA III). The coherent link will allow AMD to fused and interconnect both the CPU and GPU along with coherency in the sharing of the large memory pool which include both cache, HBM and system memory (DDR4). We have already seen Intel’s Xeon Phi Coprocessor featuring a similar design by adding Stacked DRAM and adding support for DDR4 memory on a single monolithic package.

So after this long summary of details for an unknown product, the first question that comes to mind would be, is such a design even possible? Well its very much possible and given the recent details revealed by AMD, its very much likely that one day we might see an APU as detailed by Fudzilla. The question that should be asked is not whether we will see such an APU but when we will see such an APU. If you recall about the HPC APU, we have just heard about such design recently in AMD’s 2015-2020 roadmaps which were secretly shown off in a conference held in Osaka, Japan. A closer look at the roadmap mentions the replacement to Toronto based Opteron APUs coming in-between 2016-2017. That’s around the same time we get to see Zen and the part is mentioned as HPC 64-bit APU. Additional details reveal that the design will take its harmonized design from a FirePro level graphics next core GPU and a server level x86 APU which users several cores. This HPC APU will have TDPs close to 300W and is suited entirely to the compute market. This is the kind of news that does get me excited even if it’s not for the consumers, we can expect that in the future we will have APUs of the same performance-level close to us. You can submit your saying on the rumor in the following poll whether you believe its true or not:


Read more: http://wccftech.com/amd-x86-zen-bas...nland-igpu-ddr4-memory-support/#ixzz3Wu9JiJkP

http://wccftech.com/amd-x86-zen-bas...bm-memory-greenland-igpu-ddr4-memory-support/
 
16 cores? era bom, talvez tenha só 16 compute units (cpu+gpu).
300w acho muito, ou é uma besta na computação ou corre o risco de ser outro bulldozer (alto watt/performance)
 
Falam em Zen cores mesmo. Falta saber o que um "Zen core" consegue fazer, o que vale em relação a um Intel e se os lançam a um preço enquadrado com a concorrência a nível de rendimento. Continua a ver-se números grandes, provavelmente para ajudar a vender/hype, mas o que importa verdadeiramente é o rendimento, e nessa parte a Intel parece andar mais do que descansada neste segmento. Era bom ver verdadeira concorrência no high-end para abanar um pouco o mercado, mas em 2016-17 já devem andar os Skylake a dominar o mercado de vendas e não vai ser fácil (a menos que sejam mesmo muito bons).
 
Por acaso estou curioso no que é um CPU core nessa nova geração. Mas 300w só para isso?

Bem, no fim de contas, é só rumores. Mas é interessante ver.
 
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