Zarolho
Power Member
Monterey (CA) – At an event held in Monterey today, AMD showed a wafer with “fully functional” 45 nm silicon for the first time.
According to chief technology officer Phil Hester, the 300 mm wafer code-named “Typhoon”, shown in public for the first time today, holds 45 nm dies combining SRAM and logic. The executive said that AMD’s 45 nm process is on track and recent notes from Intel that AMD is facing yield issues “are rubbish” and “wishful thinking on their side”.
The 300 mm wafers with 45 nm structures are expected to ramp in production at the end of 2007. First 45 nm processors are expected to be commercially available by mid of 2007.
More details tome come.
http://www.tgdaily.com/content/view/31974/135/
According to chief technology officer Phil Hester, the 300 mm wafer code-named “Typhoon”, shown in public for the first time today, holds 45 nm dies combining SRAM and logic. The executive said that AMD’s 45 nm process is on track and recent notes from Intel that AMD is facing yield issues “are rubbish” and “wishful thinking on their side”.
The 300 mm wafers with 45 nm structures are expected to ramp in production at the end of 2007. First 45 nm processors are expected to be commercially available by mid of 2007.
More details tome come.
http://www.tgdaily.com/content/view/31974/135/
