10.2 The Design and Implementation of a First-Generation
CELL Processor
9:00 AM
D. Pham1, S.Asano2,M. Bolliger1, M. Day1, H. Hofstee1, C. Johns1, J. Kahle1,
A. Kameyama3, J. Keaty1,Y. Masubuchi2, M. Riley1, D. Shippy1, D. Stasiak1,
M.Wang1, J.Warnock1, S.Weitzel1, D.Wendel1, T.Yamazaki1, K.Yazawa2
1IBM, Austin, TX
2Sony, Tokyo, Japan
3Toshiba, Austin, TX
A CELL Processor is a multi-core chip consisting of a 64b Power
architecture processor, multiple streaming processors, a flexible IO
interface, and a memory interface controller. This SoC is implemented in
90nm SOI technology. The chip is designed with a high degree of
modularity and reuse to maximize the custom circuit content and achieve
a high-frequency clock-rate.