With parallelism such as is on display here it's fairly easy to see how other devices in the NV4x range could be divided up. Although we don't yet know how other parts may be configured we can guess that the entry level parts will consist of one quad, the mainstream one or two quads, the performance on two or three quads, and, last, with the enthusiast segment filled with the 4 quad solution seen here.
It may also be the case that rebranded NV40 ASICs will also, possibly temporarily at least, fill out one or two of these segments. The die size of NV40 is very large in comparison to other graphics chip dies, and it's very unlikely that all die on a wafer will come back clean and working (it may even be the case that dies operating with all 16 pipelines / 4 full quads will be in the minority); however, with multiple quads on the die it may be the case that NVIDIA will choose to operate a redundancy scheme in order to minimise cost for dies that are not fully functional to NV40 specification. As ATI did with the R300 ASIC and the Radeon 9700 and 9500 products, should a defect occur in a pixel pipeline, which would probably be one of the largest element of the die in these chips, then rather than wasting the entire ASIC the quad that the pipeline exists in can be disabled. This part could thus be sold as a 12 pipeline / 3 quad product in order to make sure that at least some revenue is coming in rather than wasting that die, which would push the price of the full operational die up. We pushed David Kirk on this point on a couple of occasions, but he wasn't willing to divulge that NVIDIA would actually be doing this, although his smile suggested that they would! [Edit - recent relevations suggest that the non-Ultra GeForce 6800 will indeed feature 12 pipelines enabled, which is one quad block turned off.]
Foi uma forma de "aproveitar" o facto de terem implementado um cooler espesso como a reference card.
