PsySc0rpi0n
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Rambus Inc. (Nasdaq:RMBS), one of the world's premier technology licensing companies specializing in high-speed chip interfaces, today announced that Qimonda AG, a leading global producer of DRAM memory products, recently signed a technology license agreement for the Rambus XDR™ memory interface solution. The Rambus XDR solution will be implemented in Qimonda's 75nm process technology for integration into high-volume applications, including game consoles, digital televisions, set-top boxes and PC graphics.
Robert Feurle, vice president and general manager of Graphics DRAM at Qimonda, says:
"The XDR memory solution completes our broad graphics RAM portfolio to better serve high-performance and high-bandwidth applications for the fast growing global computing and consumer electronics markets"
The advanced XDR memory architecture features key enabling technologies built on patented Rambus innovations, including:
XDR™
Rambus XDR™ DRAM technology is a total memory system solution that achieves an order of magnitude higher performance than today's standard memories while utilizing the fewest ICs. Perfect for graphics processing, consumer electronics, network, and server applications, a single, 2-byte wide, 3.2 GHz XDR DRAM component provides 6.4 GB/sec of peak bandwidth.
The XDR solution achieves its performance using several components. The XDR DRAM device is a high-speed memory IC that turbocharges standard CMOS DRAM cores with a high-speed interface capable of 3.2 and 4.0 GHz data rates with a roadmap to 4.8, 6.4, and 8.0 GHz in the future. On the controller side, the XIO (XDR I/O) cell provides the same high-speed signaling capability found on the DRAM, but adds additional enhancements like FlexPhase™ technology. The XMC (XDR memory controller) is a fully synthesizable logical memory controller that is optimized to take advantage of the technology's many special features like Dynamic Point-to-Point. System clocks are also provided using the XCG (XDR Clock Generator), which has four programmable outputs and is guaranteed to meet the clocking requirements for the XIO and XDR DRAM devices. Rambus also completely specifies the physical interconnect, which is designed to operate on standard boards and packages designed for high-volume consumer applications.
fonte
Uma pequena diferança para o conceito actual das mems...
Robert Feurle, vice president and general manager of Graphics DRAM at Qimonda, says:
"The XDR memory solution completes our broad graphics RAM portfolio to better serve high-performance and high-bandwidth applications for the fast growing global computing and consumer electronics markets"
The advanced XDR memory architecture features key enabling technologies built on patented Rambus innovations, including:
- Differential Rambus Signaling Level (DRSL), a low-voltage, low-power, differential signaling standard that enables scalable multi-GHz, bi-directional, and point-to-point data busses that connect an XDR memory controller (XIO) to XDR DRAM devices;
- Octal Data Rate (ODR), a technology that transfers eight bits of data on each clock cycle, four times as many as today's state-of-the-art memory technologies that use DDR (Double Data Rate) clocking;
- FlexPhase™, a circuit technology that enables flexible phase relationships between signals, allowing precise on-chip alignment of data with clock; and
- Dynamic-Point-to-Point (DPP), an innovation that maintains the signal integrity benefits of point-to-point signaling on the data bus, while providing the flexibility of capacity expansions with module upgrades. DPP was recognized with a "2005 Innovation of the Year" award by industry publication EDN Magazine.
XDR™
Rambus XDR™ DRAM technology is a total memory system solution that achieves an order of magnitude higher performance than today's standard memories while utilizing the fewest ICs. Perfect for graphics processing, consumer electronics, network, and server applications, a single, 2-byte wide, 3.2 GHz XDR DRAM component provides 6.4 GB/sec of peak bandwidth.
The XDR solution achieves its performance using several components. The XDR DRAM device is a high-speed memory IC that turbocharges standard CMOS DRAM cores with a high-speed interface capable of 3.2 and 4.0 GHz data rates with a roadmap to 4.8, 6.4, and 8.0 GHz in the future. On the controller side, the XIO (XDR I/O) cell provides the same high-speed signaling capability found on the DRAM, but adds additional enhancements like FlexPhase™ technology. The XMC (XDR memory controller) is a fully synthesizable logical memory controller that is optimized to take advantage of the technology's many special features like Dynamic Point-to-Point. System clocks are also provided using the XCG (XDR Clock Generator), which has four programmable outputs and is guaranteed to meet the clocking requirements for the XIO and XDR DRAM devices. Rambus also completely specifies the physical interconnect, which is designed to operate on standard boards and packages designed for high-volume consumer applications.
fonte
Uma pequena diferança para o conceito actual das mems...
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