Processador Soft Machines CPU and SoC based on VISC architecture

Dark Kaeser

Colaborador
Staff
Tenho ideia de já ter passado por aqui, mas não consigo encontrar pela pesquisa.

The VISC architecture
VISC CPUs are built around the concept of "virtual cores" and "virtual hardware threads." A middleware layer sits between the guest operating system and its targeted instruction set architecture. This middleware translates the guest application's ISA into VISC's native instruction set and distributes its workload across the CPU's virtual cores.

he most fascinating aspect of VISC is that even in single-threaded workloads, the underlying hardware has the ability to divide that work into chunks that Soft Machines calls "threadlets." In turn, a VISC CPU can distribute the work of a demanding single thread on a virtual core across multiple hardware cores. It can also dynamically provision computing resources in mixed workloads where a demanding thread and a lighter-weight task need simultaneous access to CPU resources. That flexible resource allocation purports to allow VISC to deliver two to three times the instructions per clock of traditional CPUs.

qposwl.jpg



Soft Machines is also developing an SoC based on the Shasta CPU, which it's calling Mojave. This chip can scale across a number of power targets, from "high-end Internet of Things" devices to servers. Mojave is built around two dual-core Shasta processors to start with, while the rest of the SoC is meant to be easily customizable by design partners.

Some potential IP blocks on Mojave include one to four channels of low-power or regular DDR4 memory running at anywhere from 2400 to 3200MT/s, one to 8MB of system cache, display and imaging blocks with up to three 4K-capable display outputs, and inputs for dual 20MP cameras. The company says it's also working with Imagination Technologies to integrate the graphics firm's next-generation graphics-processing IP with the Mojave SoC, and the two companies are working to coordinate their roadmaps to hit a mid-2016 tapeout.

15etg95.jpg


http://techreport.com/news/29161/soft-machines-debuts-cpus-and-socs-based-on-visc-architecture


2eclnx2.jpg

http://www.eetimes.com/document.asp?doc_id=1327933&page_number=1
 
@Dark Kaeser eu por acaso li alguma coisa disto no tom'shardware mas é uma area que nao estou nada (pior ainda que as outras) à vontade.
isto é capaz daqui a 5+ anos fazer concorrencia à ARM ?
ou é algo que eu nao estou a ver!
 
Soft Machines talks VISC architecture details
The next issue on the list was the ISA which moves from a 32-bit one on the prototype to a full 64-bit version in the Shasta/Mojave pair. SM can run what it calls personalities in software but they are not implemented in the expected way. Personalities are software and are loaded at boot time, but they are both light and low-level. They don’t emulate code, they just translate it to the native ISA, a 32-bit add is a 32-bit add on both native and emulated hardware, but probably have differing opcodes. Occasionally this software will need to do something more complex but the bulk of the work is basically a big lookup table.

Personalities are not purely software though, there are hardware hooks to assist in with the job, unfortunately SM did not go into more detail here. One thing they did say is that the code is not user accessible and runs underneath everything including a hypervisor where applicable. In x86 terms, think of this as ring -2 or something similar. To running code and users, everything should appear to be native hardware, assuming it all works as promised.
http://semiaccurate.com/2015/10/08/soft-machines-talks-visc-architecture-details/

@JanosLee duvido que eles queiram fazer concorrência à ARM, o uso deverá ficar limitado a mercados específicos.
 
Vi os benchmarks à uns dias e parecem-me demasiado bons para ser verdade. Quero ver se corresponde à realidade quando houver lançamento de processadores com esta arquitetura.
 
Back
Topo