tjmax correctos p/ 45 e 65nm (Doc. da Intel)

infected_

Power Member
Para todos os que ainda tem duvidas sobre o tjmax dos seus cpus a intel lançou recentemente um documento com tudo isso.

http://www.tomshardware.com/news/intel-dts-specs,6517.html

update: "Unfortunately, the data provided by Intel is not actually what was expected. The developer of Core Temp received an email last month from the presenter of the August IDF presentation on the DTS specifications which said that Tjunction Max would be disclosed for all processors in Taipei. In reality, Intel disclosed a value known as "Target Tjunction," which should not be used as Tjunction Max as it will result in unrealistic temperature readings. Taking the earlier example of the B2 E6600, if you had a low ambient temperature, changing Tjunction Max so that it aligned with the Target Tjunction may result in temperature readings close to or below 0°C when at idle. Temperatures below ambient aren’t possible on normal air cooling. It seems that yet again Intel has avoided providing any valuable information at IDF. Intel hasn’t even stated exactly what Target Tjunction actually is. It is not recommended to change Tjunction Max to align with these values."


edit: achei outro documento da intel, vejam pags 14 e 15.. ja tou meio confuso agr em relaçao a isto... se alguem entender melhor ke se explique. Obrigado

edit2: Ja esclareci a minha duvida... podem apagar a thread se quiserem...
 
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